The present patent application is related to a capacitance-to-digital converter and to a method for providing a digital output signal.
Capacitive sensors are used in many applications to measure chemical and physical parameters. In order to be accurate enough, the measurement of such parameters requires a high resolution and a low-noise capacitance-to-digital converter, abbreviated to CDC. Conventional CDCs generate an intermediate voltage which is then digitized by means of an analog-to-digital converter. In most applications, the power supply rejection ratio, abbreviated to PSRR, is an important parameter. Moreover, most of the capacitive sensors are single-ended. A characteristic such as a high PSRR and a high linearity cannot easily be achieved by a CDC.
Document U.S. Pat. No. 8,410,969 B2 refers to a wide range charge balancing capacitive-to-digital converter. The CDC comprises a single-ended sensor, an offset capacitor, a reference capacitor, an integrator circuit and a demodulation circuit. The integrator circuit comprises one integrator capacitor and one output terminal.
The article M. Lemkin, B. Boser, “A Three-Axis Micromachined Accelerometer with a CMOS Position-Sense Interface and Digital Offset-Trim Electronics”, IEEE Journal of Solid-State Circuits, vol. 34, no. 4, pp. 456-468, April 1999 describes a sense element comprising two capacitors. Thus, the sensor is double-ended. Moreover, the accelerometer comprises a sigma-delta feedback loop having an input common-mode feedback.
The article S. A. Jawed et al., “A Switched Capacitor Interface for a Capacitive Microphone”, Proceedings of the 2nd Conference on Ph.D. Research in Microelectronics and Electronics, Jun. 12-15, 2006, pp. 385-388, describes a capacitive single-ended microphone, a dummy capacitance and a pseudo differential switched capacitor topology with chopper stabilization.